1. Field of the Invention
This invention relates to improvements in processes for fabricating wafer structures, and more particularly to a process for bonding two separately processed wafers together to form a single wafer with an continuous interface therebetween; to a process for burying a low impedance conductor in the crystalline lattice substrate of the single formed wafer; to the product formed by the process of the invention is presented; and to a vertical cascode integrated half H-bridge circuit and method for making same.
2. Description of the Relevant Art
Wafer fusion is a known process in which two separately processed wafers, referred to as guest and host wafers, are bonded together to form a single wafer, ideally, with a continuous interface between them. Each of the wafers are individually processed, and may contain combinable portions of a particular integrated circuit to be fabricated. In many high current applications, a low impedance conductor buried in a semiconductor crystalline lattice is needed for lateral conduction with low ohmic drops within the wafer joining interface. Buried diffusions have limited conductivity and suffer severe diffusion effects from subsequent thermal anneals associated with epitaxial depositions and diffusions.
In copending U.S. patent application Ser. No. 876,322, filed June 19, 1986, entitled "SEMIMETAL-SEMICONDUCTOR CONTACT SYSTEM", by the applicant hereof, assigned to the assignee hereof, and incorporated herein by reference as background, a semiconductor contact system is described in which electrical contact to a semiconductor region controls the boundary recombination velocity in order to optimize the semiconductor transport phenomena. The contact system includes a doped microcrystalline layer which is acceptor and oxygen doped, P.sup.- semimetal, to provide unipolar hole transport and donor and oxygen doped, N.sup.- semimetal, to provide unipolar electron transport. The semimetal is achieved by implanting oxygen and doping several atomic layers into a semiconductor region below the microcrystalline layer so that the monocrystalline lattice of the semiconductor region is not abruptly terminated, and the lattice periodicity is not disrupted. Thus, the semimetal layer is formed of doped silicon microcrystals and a surrounding silicon oxide layer. The thickness of the semimetal layer is adjusted to be thick enough to control the effective chemostatic potential terminating the semiconductor crystal and thin enough to enhance the series resistance of the semimetal layer.